RISC-V International, the global open hardware standards organization, has announced new RISC-V specifications to be approved in 2022: Efficient Trace for RISC-V (E-Trace), RISC-V Supervisor Binary Interface (SBI), RISC-V Unified Extensible Firmware Interface (UEFI) and the RISC-V Zmmul Multiply Only extension. E-Trace defines an efficient processor tracing method using branch tracing; SBI allows developers to write once and run on all RISC-V implementations; UEFI introduces the existing UEFI standard to the RISC-V platform; Zmmul Multiply Only is a low-cost implementation that only needs to multiply and not divide. RISC-V International’s members include Google and Intel. RISC-V is an open source instruction set architecture based on Reduced Instruction Set (RISC) principles, which allows anyone to design, manufacture and sell RISC-V chips and software.
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