How did RISC-V succeed?

The birth of the RISC-V processor architecture undoubtedly excites many people. However, while many say RISC-V heralds a wider open-source hardware movement, it’s unclear exactly why this architecture has been successful, and whether it will drive more open-source chip cores Appearance is also completely unknown.

“RISC-V has become the architecture of choice for many chip developers, setting off a wave of innovation in the hardware development world,” said Stephano Cetola, technical program director at RISC-V International. “Designers are designing various architecture, and develop actual chip implementations within many industries.”

This isn’t the first time the industry has opened up a processor implementation, or instruction set architecture (ISA), to the public domain. There are many examples of this in the industry, including OpenPOWER, OpenSPARC, OpenRISC, and more. While each architecture has gained some level of push, they all pale in comparison to what RISC-V has achieved in a very short period of time.

When talking to members of the RISC-V community, you’ll hear two words a lot – free and liberty. Some people want processor cores to be free, while others want the freedom to use the cores and do what they want. For these people, it doesn’t really matter if it’s free or not, because they’ll spend a lot of money to get what they want.

an ever-changing market

The rise of RISC-V has coincided with several other events in the industry.

The first is that Moore’s Law has slowed down, which means that each new chip manufacturing process node no longer means that the computing power of the chip can increase geometrically. Secondly, the rapid development of machine learning has brought about a huge increase in demand for computing power.

So, does this mean that RISC-V is just at the right place at the right time?

People’s perception of processors has changed. “ RISC-V was driven by the need for freedom in the hardware design community ,” said Simon Davidmann, founder and CEO of Imperas Software. “Electronics are defined by their functions, and many of those functions are defined by software. Yes, and the software runs on the processor. Today, all software requires some form of machine learning. For example, your phone needs machine learning to take better pictures, which in turn needs a lot of computing power, and so on. .And what people realize is, they need a lot of processors. They need their own processor architecture. You need to configure them the way you need. Off-the-shelf technology is not enough. So in the electronics market There’s a change, which is, ‘We need freedom to design chips, freedom to design processors and processor architectures on those chips’.”

Many people agree with him. “As the pace of chips scaling general computing power has stalled, the only way to deliver higher performance is through specialization,” said Roddy Urquhart, senior marketing director at Codasip. “The open RISC-V ISA is modular and supports custom instructions. , making it an ideal ISA for creating a wide variety of specialized processors and accelerators.”

We have to see that behind all of these demands is a new generation of systems companies entering the market, each with unique business dynamics. But one thing these systems companies have in common is that they don’t try to sell the chips they develop. Instead, they’re selling services that are fueled in some way by those products. They can’t buy the right products from the existing market, so they’re ready to develop their own chips while also driving some necessary innovations through contributions and collaborations. In this case, RISC-V plays an important role.

What makes RISC-V different?

RISC-V is creating breakthroughs in multiple fields, each for different reasons. To understand this, it is necessary to look at the various elements of RISC-V’s success separately. The first is the architecture itself. Second is the large number of open source architecture implementations under development. The third area is the support core around the processor core. Finally, there are the necessary tools to help companies implement and validate RISC-V processors.

It was originally created to meet a special need. “It’s got a lot of resources behind it now,” said Imperas’ Davidmann. “In the beginning it was from universities, academia, some smart people in the university made a good thing. After it came out of Berkeley, it came from Silicon Valley and A lot of ex-Berkeley grads got some momentum there. It’s getting a lot more momentum than OpenRISC. A lot of colleges need it and they’re driving it.”

RISC-V is now an open standard ISA driven by UC Berkeley and an industry nonprofit looking after it – RISC-V International. Many universities have created open processor cores, such as Berkeley’s Rocket core, ETH Zurich’s pulp platform, and more. Today, there are many industry collaborative groups that bring together industry and academia to build open source kernels and make them available to the entire community. Examples of this include the CHIPS Alliance and the OpenHW group.

Many countries have come up with projects that can meet local needs. India has the Shakti project, driven by IITMadras. In Israel, the GenPro Alliance unites industry and academia. There are similar projects in Japan and China that are developing open source RISC-V kernels to enable them to serve their communities and specific interests.

RISC-V is the first open and customizable ISA. “Currently, the main industrial interest associated with RISC-V is not about open source implementations, but about open source instruction sets,” said Andy Heinig, group leader for advanced systems integration and head of the Efficient Electronics Division at Fraunhofer IIS Adaptive Systems Engineering. With it, the environment is standardized, but the actual implementation is designed for specific company needs and owned by the company. We see similar activity in the area of ​​interfaces between chips, and many interconnect standards are being prepared and discussed. At RISC On the -V side, these interconnect standards can also support interoperability between chips from different vendors. And RISC-V provides interoperability on the software side.”

The ability to be able to modify is important. “An open source, custom extension-enabled ISA like RISC-V gives processor designers incredible freedom,” said Shubhodeep Roy Choudhury, CEO and co-founder of Valtrix Systems. “At the same time, it also Brings up a very interesting verification challenge. Ensuring that all designs meet requirements and function correctly requires changing the way the test generators are designed. They require a high degree of configurability for custom functions and legacy/benchmark functions verify.”

Going from an open ISA to an open source processor is a big jump. “The concept of open source IP is very tempting because it’s reminiscent of the concept of free IP,” said Andy Jaros, vice president of IP sales and marketing at Flex Logix. “However, open source doesn’t mean free. Most companies, unless they want to Invest huge resources in IP development, otherwise license pre-implemented RISC-V cores from countless IP vendors such as Open5, Andes and many others. This saves development, verification, software development There is still a lot of security when the work is invested.”

There are multiple companies developing kernel competitors, which also fosters innovation in the implementation space. “The real value of RISC-V is that it’s a competitor to Arm, not because it’s open source,” Jaros added. “We’re seeing a lot of RISC-V core vendors who provide the market with choice, promote Competition. And on the Arm side, you only get Arm processor cores from Arm.”

Another driver is the rapidly increasing number of cores, which makes instance-based royalty pricing quite expensive. “People want processors all over their designs,” Davidmann said. “They want a lot of small processors, and the existing Arm licensing terms are pretty difficult to do that. Of course, they’re also expensive, but more importantly, , people can’t modify Arm cores as they want. I don’t believe RISC-V is successful because it’s cheap or low cost. If you just want to do the same thing as an Arm core, you should definitely buy an Arm core because it’s fully Validation, very well designed – that’s exactly what you want. The only reason to use RISC-V is that you want the freedom to change it, add your own stuff to it.”

Even with all these favorable factors, RISC-V may not have been successful without a thriving ecosystem around it. “The many important tools developed by the open source community are a key factor in helping people develop a variety of processors based on RISC-V, such as chip technology process design kits, design verification kits, implementation tools, etc.,” RISC-V International’s Cetola “This has also driven the democratization of VLSI design, the development of higher-level design description languages, and the acceleration of design by sophisticated open-source automation tools, all of which have made RISC-V even more capable,” he said. .With design tools and toolchains, RISC-V will soon become truly ubiquitous.”

The OpenHW group is one of the collaborative projects driving the industry towards this goal. It is developing multiple processor cores and peripheral IP supporting these cores. In addition, it is building a complete set of tools for designing and verifying these cores. “The way they do things is different,” Davidmann said. “One is that they give you the source code, so you can modify it yourself. What’s more, they also give you a verification environment, so if you make changes you can also verify Does it work. If someone just throws at a core and you change some of that code, you risk breaking something. You need a complex verification environment to know if you’ve broken it. And that’s OpenHW Different in the open source hardware space because they provide a complete verification environment. If you add a new instruction, you can know if you broke other instructions. I don’t think people will just take an OpenHW core and Get started. It doesn’t make sense. If you want to save money, you can do it. But it makes sense that you can extend the kernel and it’s a really good starting base. That’s the point. You’re not starting from scratch. “

extend the scope

Can this open source momentum expand beyond processor cores?

The processor is only a small part of a complete SoC. SoCs also require memory controllers and memory interfaces, USB, PCI, and more. These components are nothing special to the product, and many would expect them to be open source as well.

The problem is that these components are very complex, and they contain analog parts that are often custom designed and implemented for specific foundries and process technologies. While the controller can also be built in an open source way, we can say that without the tight integration of the digital and analog parts, it is possible to build a defective product.

LowRISC is a UK based organisation. It originally wanted to build an open source system similar to the Raspberry Pi. Today, it develops hardware and software, including the RISC-V core, and the software compilation infrastructure that supports it, within a fully collaborative framework.

Recently, Google created a specification and IP for the silicon root of trust. It open sourced this work and delegated management to lowRISC. Part of the point here is that openness and transparency ultimately improve security and trust, not the ability to modify the specification.

in conclusion

RISC-V has enabled and enabled innovation. While free may be important to some in the industry, the real key is freedom. This freedom brings like-minded people, companies and organizations, allowing them to explore new frontiers together. Its contribution to innovation lies not only in breadth, but also in depth. While RISC-V may make more hardware blocks open source, perhaps the most important gain is the ability to quickly adopt an open specification for processors and implement it.

There was a time when the tools for processor development and verification disappeared when engineers stopped developing their own custom processors, because in the 1980s those processors offered little or no differentiation. Now that the processor space has become highly differentiated again, the industry is collaborating on the necessary tools. An unanswered question is whether they can create open source tools faster than the finished products provided by the EDA industry.

Original link:

https://semiengineering.com/why-risc-v-is-succeeding/

The text and pictures in this article are from InfoQ