Micron announced the mass production of 232-layer 3D NAND flash memory chips, the first flash memory chips to break through 200 layers, compared to competitors currently offering technology up to 176 layers. Micron’s new technology doubles the bit density per unit area of storage to 14.6 gigabits per square millimeter of storage. The bottom layer of a 3D NAND flash memory chip consists of CMOS logic circuits and other circuits that control read and write operations. Above the CMOS are vertically stacked and interconnected NAND flash memory cells. Alvaro Toledo, vice president of data center storage at Micron, said more layers will be added in the future.
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